Project K2.1

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Hardware and System Software Platform Evaluation, Implementation, and Optimization for Virtual Arabia

Motivation and Goals

Our subproject is responsible for the careful choice and evaluation of the hardware for Virtual Arabia and optimization of the software. In the recent years, microprocessor architectures have evolved into a large variety of different offerings mainly using coarse grain and instruction level parallelism, special purpose accelerators, or even programmable logic. The main topics in this context are: multi-core and many-core processors, multithreading techniques, multi-level shared-distributed caches, parallel interconnection structures, graphics hardware support, and other special purpose accelerators including support for interfacing, (reconfigurable) programmable logic arrays. Computer systems optimized for specific applications (Computational Fluid Dynamics, Computational Steering, and Engineering) have to be chosen from this large variety of design options. In order to find the best hardware choice for Virtual Arabia's software, our work packages cover benchmarking multi-/many-core architectures, evaluating different programming models, and elaborating optimization strategies.


Contributions

The Virtual Arabia benchmark is built on top of algorithms (kernels) collected from the other subprojects. The benchmark was ported on multi-core CPUs and GPUs while evaluating and combining along the way multiple parallel programming models including: OpenMP, MPI, CUDA, and StarPU. Our recent efforts focus on search based autotuning as a means to simplify the optimization of our benchmark on a wider range of systems.

In the recent years, the frequency and memory walls, resulting in the appearance of multi-core architectures, have triggered a consistent change in the way applications are developed. Hardware awareness has become an essential condition to achieve speedup on modern machines. Performance portability across systems with different processors and memories is an important requirement for many applications, including our benchmark and Virtual Arabia's software. But the variety of available hardware can make portability a complex task. Generally, to ensure a satisfactory level of performance portability across multiple machines with different characteristics, algorithms are implemented such that they expose parameters that can be tuned for a specific machine. Our autotuning problem is: given a parametric implementation of an algorithm, we want to find the values of the parameters that minimize the execution time for every given input. Moreover, a requirement is to find a good solution in a reasonable amount of time. Transforming our hand tuned kernels into parametric forms results in multi-dimensional search spaces with up to six dimensions. Efficient traversal of these spaces is the main requirement for making search based autotuning a viable optimization tool in Virtual Arabia.

Participants

Subproject Leader:

Prof. Dr. Dr.-Ing. habil. Arndt Bode

Project Members:

Dr. Alin Murarasu

Publications

Workload Balancing on Heterogeneous Systems: A Case Study of Sparse Grid Interpolation. Alin Murarasu, Josef Weidendorfer and Arndt Bode. EuroPar Workshop Proceedings, Aug. 2011.

Compact Data Structure and Scalable Algorithms for the Sparse Grid Technique . Alin Murarasu, Josef Weidendorfer, Gerrit Buse, Daniel Butnaru and Dirk Pflüger. Proceedings of the 16th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), Feb. 2011.

fastsg: A Fast Routines Library for Sparse Grids. Alin Murarasu, Gerrit Buse, Josef Weidendorfer, Dirk Pflüger and Arndt Bode. Proceedings of the International Conference on Computational Science, ICCS 2012 of Procedia Computer Science, Jun. 2012.

Advanced Optimization Techniques for Sparse Grids on Modern Heterogeneous Systems. Alin Murarasu. Dissertation, 2013.

Posters

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Poster (PDF) - Performance Analysis of the Sparse Grid Technique on Hybrid Systems Alin Murarasu, Daniel Butnaru, Gerrit Buse, Dirk Pflüger and Josef Weidendorfer SIMTECH 2011, Stuttgart, Germany, June 14th 2011.

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Poster (PDF) - The Sparse Grid Technique on GPUs Alin Murarasu, Josef Weidendorfer and Arndt Bode MAC Workshop 2010, Garching, Germany, July 14th 2010.